Closed Solicitation · DEPARTMENT OF COMMERCE

    CHIPS High-Throughput High-Resolution X-ray Laminography/Tomography System for Advanced Packaged Semiconductor Devices and Substrates

    Sol. 1333ND26QNB030031Combined Synopsis/SolicitationGAITHERSBURG, MD
    Closed
    STATUS
    Closed
    closed Mar 9, 2026
    POSTED
    Feb 24, 2026
    Publication date
    NAICS CODE
    334413
    Primary industry classification
    PSC CODE
    6640
    Product & service classification

    AI Summary

    The National Institute of Standards and Technology is seeking proposals for a high-throughput high-resolution x-ray laminography/tomography system for advanced packaged semiconductor devices and substrates. The response deadline is March 9, 2026. Vendors must provide sample carriers compatible with the automated loading system, and the instrument will be installed in a general-purpose lab.

    Contract details

    Solicitation No.
    1333ND26QNB030031
    Notice Type
    Combined Synopsis/Solicitation
    Posted Date
    February 24, 2026
    Response Deadline
    March 9, 2026
    NAICS Code
    334413AI guide
    PSC / Class Code
    6640
    Contract Code
    1341
    Issuing Office
    DEPT OF COMMERCE NIST
    Primary Contact
    Tracy Retterer
    State
    MD
    ZIP Code
    20899
    AI Product/Service
    product

    Description

    Amendment 0001: Amendment changes include the following: The required response date is extended from February 26, 2026 to March 9, 2026 No Statement of work change Questions and Answers: Question1: Is there a cleanroom specification? NIST Response: No. The instrument will be installed in a general purpose lab in the advanced measurement laboratory facility, but not within a cleanroom. Question 2: Are you flexible on the footprint (size/dimension) NIST Response: NIST expects the analytical instrument (source, stages, detectors, and shielded enclosure) to fit within the footprint specified by 10.2. Additional space is available in the lab around the instrument for service access, and for support equipment (including chase space for air compressor/dryer if required, and a work area in the lab for control and analysis PCs). Question 3: Are the devices in JEDEC Trays? NIST Response: Typically no. NIST requires significant flexibility to load samples that are within the size envelope described by specification 5. Samples will include full wafers, coupons (partial wafers), individual or groups of packaged devices, as well as atypical sample geometries. To meet requirement 5.1, vendors must include 5 sample carriers that are compatible with the automated loading system. Carriers supporting a JEDEC tray is only one possible way to meet that requirement. See Combined Synopsis Solicitation_1333ND26QNB030031, Attachment 1 - Statement of Work, and Attachment 2 - Applicable Provisions and Clauses attachments for solicitation details.

    Key dates

    1. February 24, 2026Posted Date
    2. March 9, 2026Proposals / Responses Due

    AI search tags

    Frequently asked questions

    CHIPS High-Throughput High-Resolution X-ray Laminography/Tomography System for Advanced Packaged Semiconductor Devices and Substrates is a federal acquisition solicitation issued by DEPARTMENT OF COMMERCE. Review the full description, attachments, and submission requirements on SamSearch before the response deadline.

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